Insulators for 2D nanoelectronics: the gap to bridge

Nanoelectronic devices based on 2D materials are far from delivering their full theoretical performance potential due to the lack of scalable insulators. Amorphous oxides that work well in silicon technology have ill-defined interfaces with 2D materials and numerous defects, while 2D hexagonal boron nitride does not meet required dielectric specifications. The list of suitable alternative insulators is currently very limited. Thus, a radically different mindset with respect to suitable insulators for 2D technologies may be required. We review possible solution scenarios like the creation of clean interfaces, production of native oxides from 2D semiconductors and more intensive studies on crystalline insulators

Insulators for 2D nanoelectronics: the gap to bridge

Nanoelectronic devices based on 2D materials are far from delivering their full theoretical performance potential due to the lack of scalable insulators. Amorphous oxides that work well in silicon technology have ill-defined interfaces with 2D materials and numerous defects, while 2D hexagonal boron nitride does not meet required dielectric specifications. The list of suitable alternative insulators is currently very limited. Thus, a radically different mindset with respect to suitable insulators for 2D technologies may be required. We review possible solution scenarios like the creation of clean interfaces, production of native oxides from 2D semiconductors and more intensive studies on crystalline insulators

Variability and Reliability of Graphene Field-Effect Transistors with CaF2 Insulators

Graphene is a promising material for applications as a channel in graphene field-effect transistors (GFETs) which may be used as a building block for optoelectronics, high-frequency devices and sensors. However, these devices require gate insulators which ideally should form atomically flat interfaces with graphene and at the same time contain small densities of traps to maintain high device stability. Previously used amorphous oxides, such as SiO2 and Al2O3, however, typically suffer from oxide dangling bonds at the interface, high surface roughness and numerous border oxide traps. In order to address these challenges, here we use for the first time 2nm thick epitaxial CaF2 as a gate insulator in GFETs. By analyzing device-to-device variability for over 200 devices fabricated in two batches, we find that tens of them show similar gate transfer characteristics. Our statistical analysis of the hysteresis up to 175C has revealed that while an ambient-sensitive counterclockwise hysteresis can be present in some devices, the dominant mechanism is thermally activated charge trapping by border defects in CaF2 which results in the conventional clockwise hysteresis. We demonstrate that both the hysteresis and bias-temperature instabilities in our GFETs with CaF2 are comparable to similar devices with SiO2 and Al2O3. In particular, we achieve a small hysteresis below 0.01 V for equivalent oxide thickness (EOT) of about 1 nm at the electric fields up to 15 MV/cm and sweep times in the kilosecond range. Thus, our results demonstrate that crystalline CaF2 is a promising insulator for highly-stable GFETs

Challenges for Nanoscale CMOS Logic Based on Two-Dimensional Materials

For ultra-scaled technology nodes at channel lengths below 12 nm, two-dimensional (2D) materials are a potential replacement for silicon since even atomically thin 2D semiconductors can maintain sizable mobilities and provide enhanced gate control in a stacked channel nanosheet transistor geometry. While theoretical projections and available experimental prototypes indicate great potential for 2D field effect transistors (FETs), several major challenges must be solved to realize CMOS logic circuits based on 2D materials at the wafer scale. This review discusses the most critical issues and benchmarks against the targets outlined for the 0.7 nm node in the International Roadmap for Devices and Systems scheduled for 2034. These issues are grouped into four areas; device scaling, the formation of low-resistive contacts to 2D semiconductors, gate stack design, and wafer-scale process integration. Here, we summarize recent developments in these areas and identify the most important future research questions which will have to be solved to allow for industrial adaptation of the 2D technology

Harsh Environmental Surface Acoustic Wave Temperature Sensor Based on Pure and Scandium doped Aluminum Nitride on Sapphire

This paper investigates the performance of surface acoustic wave (SAW) devices as low power MEMS temperature sensors using reactive sputter deposited aluminum nitride (AlN) and scandium doped aluminum nitride (AlScN) as piezoelectric layers on sapphire substrates. In detail, devices with a wavelength of 16 μm are fabricated with both AlN and AlScN films having a resonance frequency at room temperature of ~354 MHz and ~349 MHz, respectively. The samples are placed in a furnace and measured in argon atmosphere up to 800 °C. The temperature dependency on the frequency shows for both materials a linear decrease up to the maximum measured temperature level resulting in constant temperature coefficients of −27.62 kHz/°C and −27.81 kHz/°C, respectively

An ab initio study on resistance switching in hexagonal boron nitride

Two-dimensional materials have been widely investigated to implement memristive devices for data storage or neuromorphic computing applications because of their ultra-scaled thicknesses and clean interfaces. For example, resistance switching in hexagonal boron nitride (h-BN) has been demonstrated. This mechanism is most of the time attributed to the movement of metallic ions. It has however also been reported when h-BN is contacted with two inert electrodes such as graphene or Pt. We suggest here that the switching mechanism of the latter devices, which has not yet been clearly established, relies on locals change of the electronic structure of h-BN as caused by atomic defects, e.g., multi-vacancies. This class of intrinsic h-BN defects can create electrically controllable interlayer bridges. We use a combination of hybrid density functional theory and the Non-equilibrium Green's function formalism to show that a single interlayer bridge resulting from the presence of a trivacancy in a graphene/h-BN/graphene stack leads to a switching voltage of similar to 5 V and a high-to-low resistance ratio >100. Both values lie within the reported experimental range and thus confirm the likelihood that intrinsic defects play a key role in the resistance switching of h-BN in contact with inert electrodes.ISSN:2397-713